(a) How many cache lines are there if the cache is direct mapped? Show your work.
(b) How many sets are there if the cache is two-way associative? Which address bits are used for indexing the set in a 32-bit address? Please present the result in Addr[x:y] format (for example, Addr[8:5] means that bit 8 to bit 5 in the address are used for indexing). Show your work.
(c) If a direct mapped cache is used, what is the expected miss rate after program execution. Show your work.
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(d) If a two-way associative cache is used, what is the expected miss rate after program execution. Show your work.
(e) If a four-way associative cache is used, what is the expected miss rate after execution the program. Show your work 3. The following C program is run on a machine with a data cache that has two-word (8 byte) blocks and the data capacity of the data cache is 256 bytes. Assume that only references to the array incur memory accesses and the cache is empty at the very beginning. Hint: a variable with int type contains four bytes and the MIPs uses byte addresses int i, c, array  for (1-0; 1?256: i++) c- ctarray[i];