3 (10 points) The Hazards of Multi-cycle Functional Units Consider the following program fragment ex

3 (10 points) The Hazards of Multi-cycle Functional Units

Consider the following program fragment executing on a basic 5-stage MIPS pipeline with all stages taking 1 cycle, except the Execute stage, which takes a variable number of cycles, depending on the functional unit used:

Functional unit

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Number of units

Number of EX cycle

Integer ALU

1

1

Floating Point Add/Sub

2

3

Floating Point Loads/Store

2

3

Floating Point Multiply

1

5

Assume there are no instructions previous to instruction 1. Assume registers are written in the first half of the clock cycle and read in the second half.

(a) [6 points] Suppose the instructions enter the pipeline in order, with a new instruction starting on each cycle. (That is, assume there is no hazard detection mechanism being used and no stalls are introduced to avoid hazards.) Determine which data hazards occur in executing this program fragment. Indicate the hazards as in the following example: if there is a WAR (anti-dependence) hazard between instructions 3 and 4, involving register F8, and 3 precedes 4, put A????13(F8)A????1 in the WAR column to the right of instruction 4. An instruction may cause more than one hazard. Assume there are no instructions previous to instruction 1.

Instruction

MEANING

RAW (true)

WAR (anti)

WAW(output)

1: SUBF F1,F2,F3

2: MULTF F6,F3,F1

3: ADDF F1,F4,F5

4: SF F6,100(R1)

5: LF F1,0(R1)

6: ADDF F2,F1,F6

(b) [4 points] In this part, assume there is no forwarding hardware. If the instructions are executed in order, determine when each instruction finishes.

Instruction

Write back cycle

1: SUBF F1,F2,F3

2: MULTF F6,F3,F1

3: ADDF F1,F4,F5

4: SF F6,100(R1)

5: LF F1,0(R1)

6: ADD F2,F1,F6

 

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